Implementation of CORDIC-Based QRD-RLS Algorithm on Altera Stratix FPGA with Embedded Nios Soft Processor Technology

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WP-STXQRD-01 This white paper describes the implementation of the QR decomposition-based recursive least squares (RLS) algorithm on Altera StratixTM FPGAs. Coordinate Rotation by Digital Computer (CORDIC) operators can be efficiently time-shared to perform the QR decomposition while consuming minimal resources. Back substitution can then be performed on the embedded soft Nios processor by utilizing custom instructions to yield the final weight vectors. Analytical resource estimates along with actual implementation results illustrating the weight calculation delays are also presented.

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تاریخ انتشار 2004